Power-aware modulo scheduling for high-performance VLIW processors.
Han-Saem YunJihong KimPublished in: ISLPED (2001)
Keyphrases
- parallel processors
- list scheduling
- scheduling problem
- multiprocessor systems
- embedded processors
- parallel machines
- signal processor
- distributed memory
- multithreading
- parallel algorithm
- communication delays
- power consumption
- scheduling algorithm
- resource allocation
- parallel processing
- single processor
- parallel computing
- neural network
- highly parallel
- resource constraints
- compute intensive
- parallel computers
- memory subsystem
- round robin
- parallel execution
- parallel architectures
- flexible manufacturing systems
- dynamic scheduling
- pc cluster
- signal processing
- level parallelism
- single chip
- precedence constraints