Modifying Test Vectors for Reducing Power Dissipation in CMOS Circuits.

Yoshinobu Higami Shin-ya Kobayashi Yuzo Takamatsu

Published in: DELTA (2002)

Keyphrases

power dissipation
power reduction
power consumption
cmos technology
low power
chip design
vlsi circuits
logic circuits
digital signal processing
nm technology
high speed
network on chip
power saving
design methodology
low cost
flip flops
finite state machines
low voltage
analog circuits
energy saving