A Low Power Priority Encoding Technique with Address-Encoder and Reset-Decoder for an Improved Hierarchical Asynchronous Detector.
Chee Young LeeChae Won KimHyejin ImSoo Youn KimMinkyu SongPublished in: SMACD (2018)
Keyphrases
- low power
- decoding process
- low density parity check
- power consumption
- low cost
- high speed
- distributed video coding
- power reduction
- low complexity
- distributed source coding
- video codec
- delay insensitive
- ldpc codes
- video encoder
- error control
- error resilience
- turbo codes
- logic circuits
- channel coding
- vlsi architecture
- low power consumption
- wyner ziv
- video coding
- decoding algorithm
- image sensor
- source coding
- digital signal processing
- rate distortion
- encoding process
- motion estimation
- mixed signal
- error correction
- transform domain
- compressed video
- error resilient
- error propagation
- low bit rate
- power saving
- video compression
- rate allocation
- mode decision
- bit rate
- wyner ziv video coding
- power dissipation