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The design of a fault tolerant GEQRNS processing element for linear systolic array DSP applications.
Jermy C. Smith
Fred J. Taylor
Published in:
Great Lakes Symposium on VLSI (1994)
Keyphrases
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fault tolerant
systolic array
fault tolerance
distributed systems
parallel architecture
digital signal processing
load balancing
real time
high availability
data flow
reconfigurable architecture
fault isolation
data model
support systems
safety critical
signal processing
database systems