Selective Clock-Gating for Low-Power Synchronous Counters.

Antonio Calomarde Antonio Rubio Jordi Saludes

Published in: J. Low Power Electron. (2005)

Keyphrases

low power
power consumption
power reduction
power dissipation
low cost
high speed
single chip
power saving
power management
low power consumption
logic circuits
digital signal processing
energy saving
energy efficiency
image sensor
vlsi architecture
real time
pattern recognition
cmos technology
vlsi circuits