Bayesian statistical model checking with application to Simulink/Stateflow verification.
Paolo ZulianiAndré PlatzerEdmund M. ClarkePublished in: HSCC (2010)
Keyphrases
- model checking
- temporal logic
- formal verification
- automated verification
- verification method
- model checker
- temporal properties
- concurrent systems
- partial order reduction
- formal specification
- formal methods
- finite state
- computation tree logic
- epistemic logic
- finite state machines
- reachability analysis
- bounded model checking
- timed automata
- transition systems
- asynchronous circuits
- symbolic model checking
- reactive systems
- process algebra
- pspace complete
- knowledge based systems
- binary decision diagrams
- artifact centric
- automated reasoning