A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS.
Timothy AndersonDuc BuiShriram MoharilSoujanya NarnurMujibur RahmanAnthony LellEric BiscondiAshish ShrivastavaPeter DentMingjian YanHasan MahmoodPublished in: IEEE Symposium on Computer Arithmetic (2011)
Keyphrases
- floating point
- fixed point
- high speed
- instruction set
- graphics processing units
- level parallelism
- low power
- cmos technology
- sufficient conditions
- power consumption
- signal processing
- digital signal processing
- low cost
- floating point arithmetic
- dynamical systems
- intel xeon
- fixed point theorem
- constraint databases
- higher order
- metal oxide semiconductor
- parallel processing
- belief propagation
- active contours
- multi view
- dynamic programming
- data model
- image processing