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Logical Effort Framework for CNFET-Based VLSI Circuits for Delay and Area Optimization.

Muhammad AliMohammad A. AhmedMalgorzata Chrzanowska-Jeske
Published in: IEEE Trans. Very Large Scale Integr. Syst. (2019)
Keyphrases
  • vlsi circuits
  • logical framework
  • optimization scheme
  • neural network
  • evolutionary algorithm