A Speculative Trace Reuse Architecture with Reduced Hardware Requirements.
Maurício L. PillaBruce R. ChildersAmarildo T. da CostaFelipe M. G. FrançaPhilippe Olivier Alexandre NavauxPublished in: SBAC-PAD (2006)
Keyphrases
- hardware architecture
- real time
- software implementation
- vlsi architecture
- hardware software
- commercial off the shelf
- low cost
- management system
- hardware and software
- design goals
- hardware design
- pipeline architecture
- vlsi implementation
- massively parallel
- host computer
- learning objects
- design principles
- hardware implementation
- computing systems
- hardware architectures
- learning object repositories
- abstraction layer
- data management systems
- computer systems
- ibm zenterprise
- content addressable
- parallel architecture
- multithreading
- heterogeneous environments
- processing units
- real time systems
- design methodology
- data flow
- neural network