Multi-functional systolic array with reconfigurable micro-power processing elements.
Emina I. MilovanovicTatjana R. NikolicMile K. StojcevIgor Z. MilovanovicPublished in: Microelectron. Reliab. (2009)
Keyphrases
- systolic array
- parallel architecture
- processing elements
- reconfigurable architecture
- functional units
- parallel processing
- hardware implementation
- parallel implementation
- data flow
- shared memory
- power consumption
- random access
- distributed memory
- massively parallel
- parallel computers
- parallel architectures
- neural network
- image processing algorithms
- efficient implementation
- database systems