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Mapping Multi-Level Loop Nests onto CGRAs Using Polyhedral Optimizations.
Dajiang Liu
Shouyi Yin
Leibo Liu
Shaojun Wei
Published in:
IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2015)
Keyphrases
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level parallelism
coarse grained
fine grained
database
general purpose
convex hull
real time
hardware implementation