Power Side-Channel Analysis for Different Adders on FPGA.
Yilin ZhaoQidi ZhangHiroki NishikawaXiangbo KongHiroyuki TomiyamaPublished in: ISOCC (2021)
Keyphrases
- programmable logic
- high speed
- power consumption
- real time
- field programmable gate array
- low cost
- real time image processing
- hardware design
- machine learning
- verilog hdl
- power reduction
- power distribution
- fpga implementation
- knowledge base
- information retrieval
- single chip
- power dissipation
- hardware implementation
- low power
- data acquisition
- signal processing