A low cost hierarchical system for VLSI layout and verification.
Tom H. EdmondsonRichard M. JenningsPublished in: DAC (1981)
Keyphrases
- low cost
- single chip
- low power
- model checking
- high speed
- signal processing
- formal verification
- vlsi design
- coarse to fine
- hierarchical clustering
- signature verification
- digital camera
- hierarchically organized
- real time
- information systems
- document image retrieval
- verification method
- cryptographic protocols
- layout design
- hierarchical classification
- hierarchical model
- rfid tags
- highly efficient
- petri net
- unsupervised learning
- database systems