A Versatile Reconfigurable Bit-Serial Multiplier Architecture in Finite Fields GF(2m).
Morteza NikooghadamEhsan MalekianAli ZakerolhosseiniPublished in: CSICC (2008)
Keyphrases
- hardware implementation
- systolic array
- management system
- finite number
- xilinx virtex
- hardware architecture
- real time
- data flow
- heterogeneous computing
- reconfigurable architecture
- fpga device
- architectural design
- network architecture
- software architecture
- general purpose
- neural network
- efficient implementation
- parallel architecture
- s box
- fine grain
- layered architecture
- cellular automata
- low cost
- knowledge base