Design of an application-specific instruction set processor for high-throughput and scalable FFT.

Xuan Guan Hai Lin Yunsi Fei

Published in: DATE (2009)

Keyphrases

instruction set
application specific
high throughput
floating point
general purpose
computer architecture
computation intensive
instruction set architecture
low latency
microarray
embedded systems
ibm power processor
memory subsystem
data acquisition
design process
wireless sensor networks
image analysis