Bitsliced Implementation of Non-Algebraic 8×8 Cryptographic S-Boxes Using ×86-64 Processor SIMD Instructions.
Yaroslav SovynVolodymyr KhomaMichal PodporaPublished in: IEEE Trans. Inf. Forensics Secur. (2023)
Keyphrases
- s box
- single instruction multiple data
- advanced encryption standard
- parallel processing
- chaotic map
- efficient implementation
- highly parallel
- design criteria
- parallel architecture
- block cipher
- instruction set
- chaotic sequence
- parallel algorithm
- computer architecture
- parallel implementation
- processor core
- hash functions
- parallel architectures
- smart card
- shared memory