Refrint: Intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies.

Aditya Agrawal Prabhat Jain Amin Ansari Josep Torrellas

Published in: HPCA (2013)

Keyphrases

multithreading
memory subsystem
parallel computing
computational power
highly efficient
distributed memory
shared memory
intelligent systems
ibm power processor
cache misses
multiprocessor systems
chip design
memory access
data access
hierarchical structure
analog vlsi
high speed