Reachability-based Control Synthesis under Signal Temporal Logic Specifications.
Wei RenRaphaël JungersPublished in: ACC (2022)
Keyphrases
- temporal logic
- concurrent systems
- model checking
- transition systems
- reactive systems
- bounded model checking
- model checker
- formal specification language
- modal logic
- satisfiability problem
- formal specification
- computation tree logic
- control signals
- belief revision
- linear temporal logic
- verification method
- mazurkiewicz traces
- state space
- search space
- formal verification
- temporal knowledge
- predicate logic
- symbolic model checking
- dynamic constraints
- specification language
- temporally extended
- transitive closure
- description language
- finite state
- reverse engineering
- knowledge base