High-performance VLSI multiplier with a new redundant binary coding.
Xiaoping HuangBelle W. Y. WeiHonglu ChenYuhai H. MaoPublished in: J. VLSI Signal Process. (1991)
Keyphrases
- gray code
- error correcting
- logical operations
- coding scheme
- vlsi design
- high speed
- floating point
- non binary
- vlsi circuits
- code length
- error control
- binary tree
- signal processing
- coding method
- linear prediction
- error correction
- inter frame
- cost effective
- hamming distance
- high reliability
- high efficiency
- fixed point
- association rules