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Efficient System-Level Hardware Synthesis of Dataflow Programs Using Shared Memory Based FIFO - HEVC Decoder Case Study.
Mariem Abid
Khaled Jerbi
Mickaël Raulet
Olivier Déforges
Mohamed Abid
Published in:
J. Signal Process. Syst. (2018)
Keyphrases
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case study
low cost
parallel execution
high level language
real time
hardware and software
low complexity
data flow
functional programs
computing systems
parallel computing
video codec
control program
hardware implementation
control flow
fpga implementation