Parallel-pipelined architecture for 2-D ICT VLSI implementation.

Juan A. Michell Gustavo A. Ruiz Angel M. Burón

Published in: ICIP (3) (2003)

Keyphrases

vlsi implementation
pipelined architecture
vlsi architecture
hardware implementation
information and communication technologies
field programmable gate array
fir filters
case study
computational complexity
low cost
computer vision
image processing
parallel processing
massively parallel