Sign in
15.7 14b 35MS/S SAR ADC achieving 75dB SNDR and 99dB SFDR with loop-embedded input buffer in 40nm CMOS.
Martin Kramer
Erwin Janssen
Kostas Doris
Boris Murmann
Published in:
ISSCC (2015)
Keyphrases
</>
high speed
db universal database
embedded systems
low cost
neural network
video sequences
video camera
synthetic aperture radar
feedback loop