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A 2-GHz 6.1-mA Fully-Differential CMOS Phase-Locked Loop.

Li ZhangBaoyong ChiZhihua WangHongyi ChenJinke YaoEnde Wu
Published in: ISCAS (2007)
Keyphrases
  • phase locked loop
  • high speed
  • power consumption
  • low cost
  • analog vlsi
  • low power
  • image sensor
  • power supply
  • delay insensitive
  • real time
  • frequency band