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A partially reconfigurable architecture supporting hardware threads.
Ying Wang
Jian Yan
Xuegong Zhou
Lingli Wang
Wayne Luk
Chenglian Peng
Jiarong Tong
Published in:
FPT (2012)
Keyphrases
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reconfigurable architecture
systolic array
low cost
hardware and software
parallel architecture
computing systems
real time
decision support
computer systems
hardware implementation
embedded systems
personal computer
pattern recognition
vlsi implementation
hardware design
high end
massively parallel
data flow