Power-aware implementation of ASIC/SOC in 0.13 micron CMOS technology.
Aleksandar PanceMadan MohanPaul MasterPublished in: ISCAS (2) (2004)
Keyphrases
- cmos technology
- low power
- power consumption
- single chip
- power dissipation
- spl times
- high speed
- low voltage
- low cost
- embedded dram
- power management
- parallel processing
- image sensor
- digital signal processing
- mixed signal
- silicon on insulator
- hardware architecture
- design methodology
- hardware implementation
- hidden markov models
- image sequences