${O(N)}$O(N) Memory-Free Hardware Architecture for Burrows-Wheeler Transform.
Surajeet GhoshSanchita Saha RayPublished in: IEEE Trans. Computers (2023)
Keyphrases
- hardware architecture
- processing elements
- associative memory
- hardware implementation
- hardware architectures
- field programmable gate array
- memory management
- computer vision
- main memory
- memory requirements
- computational power
- information systems
- case study
- probabilistic model
- massively parallel
- block matching motion estimation