Mixed Synchronous/Asynchronous State Memory for Low Power FSM Design.
Cao CaoBengt OelmannPublished in: DSD (2004)
Keyphrases
- low power
- single chip
- power consumption
- low power consumption
- low cost
- power dissipation
- high speed
- vlsi architecture
- logic circuits
- digital signal processing
- finite state machines
- cmos technology
- asynchronous communication
- mixed signal
- gate array
- power reduction
- delay insensitive
- wireless transmission
- image processing
- signal processor
- cmos image sensor
- ultra low power