An architecture for the efficient implementation of compressive sampling reconstruction algorithms in reconfigurable hardware.
Fernando E. OrtizEric J. KelmelisGonzalo R. ArcePublished in: Visual Information Processing (2007)
Keyphrases
- efficient implementation
- reconfigurable hardware
- hardware implementation
- compressive sampling
- compressive sensing
- low cost
- compressed sensing
- hardware software
- field programmable gate array
- image processing
- fine grain
- random projections
- evolvable hardware
- image reconstruction
- hardware and software
- hardware design
- functional units
- orthogonal matching pursuit
- transform domain
- image processing algorithms
- sparse representation
- multiscale
- real time
- evolutionary algorithm
- image segmentation