A real-time H.264/AVC VLSI encoder architecture.
Konstantinos BabionitakisGregory DoumenisGeorge GeorgakarakosGeorge LentarisKonstantinos NakosDionysios I. ReisisIoannis SifnaiosNikolaos VlassopoulosPublished in: J. Real Time Image Process. (2008)
Keyphrases
- vlsi architecture
- low complexity
- real time
- bit rate
- mode decision
- rate distortion
- video codec
- video encoder
- video encoding
- motion estimation
- vlsi implementation
- rate control
- macroblock
- decoding process
- video coding
- high speed
- low cost
- low power
- mode selection
- high definition
- computational complexity
- inter frame
- coding efficiency
- bitstream
- video streams
- scalable video coding
- image quality
- high coding efficiency
- processor array
- rate control algorithm
- multiple description coding
- entropy coding
- distributed video coding
- bit allocation
- video coding standard
- bit plane
- low bit rate
- compressed domain
- motion vectors