A single chip VLSI architecture for a real time stereo vision processor.

Francis Jutand Serge Maginot Nicolas Demassieux Henri Maître

Published in: ICASSP (1988)

Keyphrases

single chip
vlsi architecture
low power
stereo vision
low cost
high speed
power consumption
real time
stereo matching
vision system
embedded processors
stereo images
image sensor
vlsi implementation
image processing
digital camera
d scene
high resolution
computer vision