Compact FPGA-based systolic array architecture suitable for vision systems.
Griselda SaldañaMiguel Arias-EstradaPublished in: Int. J. High Perform. Syst. Archit. (2007)
Keyphrases
- vision system
- systolic array
- parallel architecture
- data flow
- reconfigurable architecture
- computer vision systems
- hardware implementation
- real time
- hardware architecture
- stereo vision
- scene understanding
- hardware design
- computer vision
- active stereo
- biological vision systems
- stereo camera
- visual attention
- world model
- visual environment
- test bed
- autonomous agents
- high frequency
- visual input
- machine vision systems
- query language
- pairwise
- expert systems
- data mining