Scalable Digital Synchronizer for Enabling Hardware-Level BLE Mesh Networks under 1 mW.

Ivan Bukreyev Ken Ho Alyssa B. Apsel

Published in: ESSCIRC (2021)

Keyphrases

low cost
real time
hardware implementation
levels of abstraction
data sets
power consumption
low latency
neural network
information systems
image processing
computer systems
higher level
operating system
personal computer
circuit design