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Configurable N-fold Hardware Architecture for Convolutional Neural Networks.
Darío Baptista
Fernando Morgado Dias
Leonel Sousa
Published in:
ICBEA (2018)
Keyphrases
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hardware architecture
convolutional neural networks
convolutional network
hardware implementation
hardware architectures
field programmable gate array
processing elements
block matching motion estimation
associative memory
genetic algorithm
case study