Accelerating Force-directed Graph Layout with Processing-in-Memory Architecture.
Ruihao LiShuang SongQinzhe WuLizy K. JohnPublished in: HiPC (2020)
Keyphrases
- directed graph
- processing elements
- memory management
- random walk
- real time
- parallel architecture
- distributed processing
- computational power
- hardware architecture
- management system
- undirected graph
- random access
- shortest path problem
- maximum flow
- directed acyclic graph
- graph structure
- information processing
- associative memory
- processing units
- master slave
- strongly connected
- transition matrix
- digital signal processors