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A chip design and implementation of a 13-bit high-order oversampling modulator for ISDN-U interface.

S.-M. WuR.-Y. LiuY.-C. Chu
Published in: ICECS (1999)
Keyphrases
  • high order
  • chip design
  • higher order
  • sigma delta
  • low order
  • pairwise
  • lower order
  • efficient implementation
  • user interface
  • bayesian logistic regression
  • computer vision
  • design methodology
  • tensor analysis