Hardware architecture of the fast mode decision algorithm for H.265/HEVC.
Wenjun ZhaoTakao OnoyeTian SongPublished in: ICIP (2014)
Keyphrases
- hardware architecture
- intra prediction
- hardware implementation
- coding efficiency
- video compression
- mode decision
- spatial correlation
- hardware architectures
- macroblock
- video transmission
- video coding standard
- pixel wise
- image coding
- associative memory
- field programmable gate array
- motion estimation
- motion vectors
- bit rate
- processing elements
- video codec
- motion compensation
- signal processing
- computer vision
- block matching motion estimation