Low power single bitline 6T SRAM cell with high read stability.
Budhaditya MajumdarSumana BasuPublished in: ReTIS (2011)
Keyphrases
- low power
- power consumption
- low cost
- high speed
- low power consumption
- single chip
- power reduction
- high power
- image sensor
- vlsi architecture
- logic circuits
- power management
- digital signal processing
- wireless transmission
- vlsi circuits
- real time
- gate array
- power saving
- hardware and software
- wireless networks
- motion estimation