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An optimized FPGA design of inverse quantization and transform for HEVC decoding blocks and validation in an SW/HW environment.

Ahmed Ben AtitallahManel KammounRabie Ben Atitallah
Published in: Turkish J. Electr. Eng. Comput. Sci. (2020)
Keyphrases
  • real time
  • rapid prototyping
  • hardware design
  • low cost
  • hardware implementation
  • hardware architecture
  • user interface
  • design process
  • fpga implementation