An Enhanced DSP Block Architecture for FPGA Supporting Multi-operands Addition Operation.
Sanlin ChenGang CaiZhihong HuangPublished in: ASICON (2021)
Keyphrases
- systolic array
- signal processing
- high speed
- hardware implementation
- real time
- verilog hdl
- digital signal processing
- hardware design
- hardware architecture
- real time image processing
- dedicated hardware
- parallel architecture
- software implementation
- digital signal
- hardware architectures
- fpga technology
- software architecture
- distributed intelligent
- data flow
- digital signal processor
- fpga device
- low cost
- pipelined architecture
- low power consumption
- texas instruments
- neural network