Login / Signup

Cache simulation for irregular memory traffic on multi-core CPUs: Case study on performance models for sparse matrix-vector multiplication.

James D. TrotterJohannes LangguthXing Cai
Published in: J. Parallel Distributed Comput. (2020)
Keyphrases
  • sparse matrix
  • case study
  • data sets
  • pattern recognition
  • main memory
  • floating point
  • probabilistic model