Development of low-complexity all-digital frequency locked loop as 500 MHz reference clock generator for field-programmable gate array.
Sigit YuwonoSeok-Kyun HanGiwan YoonHan-Jin ChoSang-Gug LeePublished in: IET Circuits Devices Syst. (2014)
Keyphrases
- low complexity
- fpga device
- field programmable gate array
- clock frequency
- hardware implementation
- high speed
- motion estimation
- computational complexity
- parallel computing
- embedded systems
- programmable logic
- case study
- software engineering
- power consumption
- lower complexity
- distributed video coding
- information systems
- high frequency
- data processing
- high end
- multi agent systems
- three dimensional
- image processing
- real time
- hardware software co design
- digital signal processors