Design of FinFET based low power, high speed hybrid decoder for SRAM.
Epiphany Jebamalar LeavlineSomasekaran SujithaPublished in: Microelectron. J. (2022)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- low power consumption
- low cost
- vlsi architecture
- logic circuits
- digital signal processing
- cmos technology
- power reduction
- gate array
- mixed signal
- high power
- power dissipation
- wireless transmission
- ultra low power
- nm technology
- vlsi circuits
- real time
- image sensor
- design methodology
- video decoder
- data transmission
- signal processor
- low complexity
- image processing