A scalable shared buffer ATM switch architecture.

A. Agrawal A. Raju S. Varadarajan Magdy A. Bayoumi

Published in: Great Lakes Symposium on VLSI (1995)

Keyphrases

real time
multiprocessor architecture
high speed
software architecture
scalable distributed
management system
multi processor
priority scheduling
information systems
lightweight
neural network
expert systems
end to end
network architecture
atm networks