Build Automation and Runtime Abstraction for Partial Reconfiguration on Xilinx Zynq UltraScale+.

Alex R. Bucknall Shanker Shreejith Suhaib A. Fahmy

Published in: FPT (2020)

Keyphrases

high level
hardware implementation
high speed
data structure
query processing
distribution network
real world
data mining
learning algorithm
artificial intelligence
social networks
image processing
case study
bayesian networks
efficient implementation
fpga implementation