An FPGA-based parallel sorting architecture for the Burrows Wheeler transform.
José Francisco Martínez TrinidadRené Cumplido-ParraClaudia Feregrino UribePublished in: ReConFig (2005)
Keyphrases
- master slave
- hardware implementation
- parallel architecture
- hardware architecture
- multi processor
- distributed processing
- management system
- hardware design
- parallel computers
- processor array
- parallel implementation
- parallel processing
- massively parallel
- shared memory
- parallel programming
- sorting algorithms
- distributed memory
- multi core processors
- parallel computing
- software architecture
- layered architecture
- distributed systems
- hardware architectures
- real time
- pipelined architecture
- parallel computation
- processing units
- design methodology
- application specific
- parallel algorithm
- low cost
- image processing
- knowledge base
- information systems
- neural network