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Compact hardware architecture for first one detector using priority-based uniform partition.

Mooseop KimJong Wook Han
Published in: ICTC (2012)
Keyphrases
  • hardware architecture
  • hardware implementation
  • hardware architectures
  • associative memory
  • detection algorithm
  • processing elements
  • field programmable gate array
  • machine learning
  • open source
  • distributed systems