Efficient bit-level systolic array implementation of FIR and IIR digital filters.

Chin-Liang Wang Che-Ho Wei Sin-Horng Chen

Published in: IEEE J. Sel. Areas Commun. (1988)

Keyphrases

digital filters
systolic array
infinite impulse response
iir filters
low pass filter
discrete wavelet transform
data flow
multiresolution
finite impulse response
reconfigurable architecture
fir filters
efficient implementation
median filter
parallel architecture
transfer function