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A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS.

Martin KramerErwin JanssenKostas DorisBoris Murmann
Published in: IEEE J. Solid State Circuits (2015)
Keyphrases
  • database
  • low power
  • wavelet transform
  • low cost
  • embedded systems