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Digitally programmable offset compensation of comparators in flash ADCs for hybrid ADC architectures.

Marina ZlochistiSeyed Alireza ZahraiMarvin Onabajo
Published in: MWSCAS (2015)
Keyphrases
  • single chip
  • low cost
  • digital signal processors
  • general purpose
  • social networks
  • information systems
  • hybrid learning
  • real time
  • neural network
  • multiscale
  • data structure
  • neural architectures
  • foreseeable future