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Low-power dual-edge triggered state-retention scan flip-flop.
Hossein Karimiyan
Sayed Masoud Sayedi
Hossein Saidi
Published in:
IET Comput. Digit. Tech. (2010)
Keyphrases
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low power
power consumption
low cost
high speed
power dissipation
cmos technology
low power consumption
high power
wireless transmission
single chip
digital signal processing
real time
logic circuits
vlsi architecture
pattern recognition
video sequences
computer vision